Although it is well known to use oversampling clock/data recovery systems, and it is a frequent goal of those systems to extract timing information from an input serial data stream. The timing information is typically extracted by looking at signal edges, and when those detected edges occur in time with respect to each other. Noise in the input data stream complicates the identification and use of data edge clock/data recovery systems.
Prior art analog solutions often use phase detectors which use an exclusive OR (XOR) algorithm appropriate for the application and data, or which use latches that trigger on the different edge movements. Prior art digital solutions that use phase lock loops also traditionally use XOR gates. For those applications having lots of data, such as in serial transmission systems, the prior art clock/data recovery system performs an XOR operation between one sampled bit and the next sampled bit. Changes from one sampled bit to another are taken to indicate an edge. The problem with this solution is that it is not very robust and does not handle noise or other data distortions or artifacts in the input data stream very well. In one sample time in which a single edge transition may properly occur, the data stream or sampling may have multiple transitions that are not properly handled by the XOR algorithm. The XOR system is unable to use all the information in the sampled data that might indicate that the sample is not good, or unable to indicate that in certain situations, even when there are multiple transitions, the data sample is still able to provide meaningful edge information.
Accordingly, what is needed is a system and method for more accurately and efficiently evaluating a data group of oversampled bits to detect edge transitions and to improve use of information available from a sampled data while maintaining acceptable noise rejection. The present invention addresses such a need.